1. Field of the Invention
The present invention relates to a circuit for driving a field-effect transistor (FET) functioning as a switching element.
2. Description of the Related Art
FIG. 11 illustrates a direct current (DC) voltage converter (hereinafter referred to as a DC/DC converter) including a general FET gate driving circuit as discussed in Japanese Patent Application Laid-Open No. 2000-23355. The DC/DC converter is a step-down DC/DC converter, which is a type of the DC/DC converter, and an FET 30 receives an input voltage Vin of the step-down DC/DC converter. Generally, a P-channel FET is used as such an FET used in the step-down DC/DC converter, and a gate terminal of the FET 30 is connected to a push pull circuit formed by transistors 27 and 28 functioning as switch elements via a resistor 29. This push pull circuit is used to increase the speed of charging and discharging electric charges supplied to the gate of the FET 30 and hence to increase the switching speed of the FET 30. The push pull circuit is connected to a PWM circuit formed by resistors 25 and 24, a transistor 26, comparators 23 and 22, a triangular wave generator (oscillator (OSC)) 20, and a constant voltage source 21. Thus, the FET 30 receives a PWM switching pulse and executes a switching operation, based on the output voltage difference information fed back to the comparator 22. In this way, an inductor 31 and a diode 32 receive a pulse voltage.
The inductor 31, the diode 32, and an electrolytic capacitor 33 convert the pulse voltage to a DC output voltage Vout. Resistors 34 and 35 divide the output voltage Vout, and the comparator 22 receives the divided voltage. Thus, as described above, the FET 30 executes a PWM switching based on the output voltage (Vout) difference information. In this way, the output voltage Vout is made to have a constant level.
In recent years, along with the advancement of techniques of miniaturizing semiconductor devices, a metal-oxide-semiconductor field-effect transistor (MOSFET) having a low threshold voltage of a gate-source voltage Vgs (hereinafter referred to as an on-threshold voltage) is generally used as such an FET used in the above driving circuit. For example, previous-generation MOSFETs generally have the following standards for the on-threshold voltage and a MOSFET turn-off voltage (hereinafter referred to as a cutoff voltage): Vgs on-threshold voltage: 4.0 V (minimum), and Vgs cutoff voltage: 1.5 V (minimum) to 2.5 V (maximum). However, the recent trend of miniaturization of semiconductor devices has made the following standards more common: Vgs on-threshold voltage: 2.5 V (minimum), and Vgs cutoff voltage: 0.5 V (minimum) to 1.5 V (maximum). Thus, the Vgs cutoff voltage tends to decrease as the Vgs on-threshold voltage decreases.
If a MOSFET having a low Vgs on-threshold voltage as described above is used as the switching FET used in the above step-down DC/DC converter (FIG. 11), the following problems remain. The following description will be made based on an example where a MOSFET having a Vgs on-threshold voltage of 2.5 V (minimum) is used.
FIG. 12 illustrates a circuit operation of a step-down DC/DC converter using a MOSFET having a low Vgs on-threshold voltage. FIG. 13 illustrates a waveform of a gate terminal voltage of the MOSFET (hereinafter referred to as FET 30) obtained when the step-down DC/DC converter of FIG. 12 operates. In FIG. 13, during a period when the transistor 26 is turned off (from time t3 to time t5), the transistor 27 is turned on, and the FET 30 is turned off. Since the transistor 27 operates as an emitter follower circuit, a base-emitter voltage Vbe of the transistor 27 becomes approximately equal to a collector-emitter voltage Vice of the transistor 27. Generally, a transistor has a base-emitter voltage Vbe of approximately 0.7 V. Thus, the FET 30 has a Vgs cutoff voltage of approximately 0.7 V, which is approximately equal to the base-emitter voltage Vbe of the transistor 27.
As described above, an FET having a low Vgs on-threshold voltage also has a low Vgs cutoff voltage. Generally, if the Vgs on-threshold voltage of an FET is 2.5 V (minimum), the cutoff voltage of the FET is set to be 0.5 V (minimum) to 1.5 V (maximum). Thus, to turn off this FET completely, it is necessary to set the Vgs cutoff voltage to 0.5V or less. However, as described above, based on the circuit configuration of FIG. 11 (circuit operation of FIG. 12), the Vgs cutoff voltage is approximately 0.7 V; that is, the Vgs cutoff voltage cannot be set to 0.5 V or less. Since the FET 30 cannot be turned off completely, the FET 30 remains in an on state, resulting in problematic heat generation or a defective operation of the DC/DC converter.